Infuse-IoT SDK API 0.0.1
A Scalable Open Source RTOS
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cfg.h File Reference
#include <zephyr/net_buf.h>
#include <zephyr/sys/byteorder.h>
#include <infuse/gnss/ubx/protocol.h>

Go to the source code of this file.

Data Structures

struct  ubx_cfg_val
 Configuration value structure as returned by parser. More...

Macros

#define UBX_CFG_VALUE_APPEND(buf, key, value)
 Macro to append a configuration value to a buffer.

Enumerations

enum  ubx_cfg_key_ana { UBX_CFG_KEY_ANA_USE_ANA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_ANA) | 0x01) , UBX_CFG_KEY_ANA_ORBMAXERR = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_ANA) | 0x02) }
enum  ubx_cfg_key_batch {
  UBX_CFG_KEY_BATCH_ENABLE = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_BATCH) | 0x13) , UBX_CFG_KEY_BATCH_PIOENABLE = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_BATCH) | 0x14) , UBX_CFG_KEY_BATCH_MAXENTRIES = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_BATCH) | 0x15) , UBX_CFG_KEY_BATCH_WARNTHRS = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_BATCH) | 0x16) ,
  UBX_CFG_KEY_BATCH_PIOACTIVELOW = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_BATCH) | 0x18) , UBX_CFG_KEY_BATCH_PIOID = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_BATCH) | 0x19) , UBX_CFG_KEY_BATCH_EXTRAPVT = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_BATCH) | 0x1a) , UBX_CFG_KEY_BATCH_EXTRAODO = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_BATCH) | 0x1b)
}
enum  ubx_cfg_key_bds { UBX_CFG_KEY_BDS_USE_GEO_PRN = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_BDS) | 0x14) }
enum  ubx_cfg_key_hw {
  UBX_CFG_KEY_HW_ANT_CFG_VOLTCTRL = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_HW) | 0x2E) , UBX_CFG_KEY_HW_ANT_CFG_SHORTDET = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_HW) | 0x2F) , UBX_CFG_KEY_HW_ANT_CFG_SHORTDET_POL = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_HW) | 0x30) , UBX_CFG_KEY_HW_ANT_CFG_OPENDET = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_HW) | 0x31) ,
  UBX_CFG_KEY_HW_ANT_CFG_OPENDET_POL = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_HW) | 0x32) , UBX_CFG_KEY_HW_ANT_CFG_PWRDOWN = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_HW) | 0x33) , UBX_CFG_KEY_HW_ANT_CFG_PWRDOWN_POL = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_HW) | 0x34) , UBX_CFG_KEY_HW_ANT_CFG_RECOVER = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_HW) | 0x35) ,
  UBX_CFG_KEY_HW_ANT_SUP_SWITCH_PIN = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_HW) | 0x36) , UBX_CFG_KEY_HW_ANT_SUP_SHORT_PIN = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_HW) | 0x37) , UBX_CFG_KEY_HW_ANT_SUP_OPEN_PIN = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_HW) | 0x38) , UBX_CFG_KEY_HW_ANT_ON_SHORT_US = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_HW) | 0x3C) ,
  UBX_CFG_KEY_HW_ANT_SUP_ENGINE = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_HW) | 0x54) , UBX_CFG_KEY_HW_ANT_SUP_SHORT_THR = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_HW) | 0x55) , UBX_CFG_KEY_HW_ANT_SUP_OPEN_THR = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_HW) | 0x56) , UBX_CFG_KEY_HW_RF_LNA_MODE = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_HW) | 0x57)
}
enum  ubx_cfg_key_hw_ant_sup_engine { UBX_CFG_HW_ANT_SUP_ENGINE_EXT = 0 , UBX_CFG_HW_ANT_SUP_ENGINE_MADC = 1 }
enum  ubx_cfg_key_hw_rf_lna_mode { UBX_CFG_HW_RF_LNA_MODE_NORMAL = 0 , UBX_CFG_HW_RF_LNA_MODE_LOWGAIN = 1 , UBX_CFG_HW_RF_LNA_MODE_BYPASS = 2 }
enum  ubx_cfg_key_i2c { UBX_CFG_KEY_I2C_ADDRESS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_I2C) | 1) , UBX_CFG_KEY_I2C_EXTENDEDTIMEOUT = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_I2C) | 2) , UBX_CFG_KEY_I2C_ENABLED = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_I2C) | 3) }
enum  ubx_cfg_key_i2cinprot { UBX_CFG_KEY_I2CINPROT_UBX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_I2CINPROT) | 1) , UBX_CFG_KEY_I2CINPROT_NMEA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_I2CINPROT) | 2) }
enum  ubx_cfg_key_i2coutprot { UBX_CFG_KEY_I2COUTPROT_UBX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_I2COUTPROT) | 1) , UBX_CFG_KEY_I2COUTPROT_NMEA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_I2COUTPROT) | 2) }
enum  ubx_cfg_key_infmsg {
  UBX_CFG_KEY_INFMSG_UBX_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_INFMSG) | 0x01) , UBX_CFG_KEY_INFMSG_UBX_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_INFMSG) | 0x02) , UBX_CFG_KEY_INFMSG_UBX_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_INFMSG) | 0x05) , UBX_CFG_KEY_INFMSG_NMEA_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_INFMSG) | 0x06) ,
  UBX_CFG_KEY_INFMSG_NMEA_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_INFMSG) | 0x07) , UBX_CFG_KEY_INFMSG_NMEA_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_INFMSG) | 0x0a)
}
enum  ubx_cfg_key_infmsg_all {
  UBX_CFG_INFMSG_ALL_ERROR = 0x01 , UBX_CFG_INFMSG_ALL_WARNING = 0x02 , UBX_CFG_INFMSG_ALL_NOTICE = 0x04 , UBX_CFG_INFMSG_ALL_TEST = 0x08 ,
  UBX_CFG_INFMSG_ALL_DEBUG = 0x10
}
enum  ubx_cfg_key_itfm {
  UBX_CFG_KEY_ITFM_BBTHRESHOLD = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_ITFM) | 0x01) , UBX_CFG_KEY_ITFM_CWTHRESHOLD = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_ITFM) | 0x02) , UBX_CFG_KEY_ITFM_ENABLE = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_ITFM) | 0x0d) , UBX_CFG_KEY_ITFM_ANTSETTING = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_ITFM) | 0x10) ,
  UBX_CFG_KEY_ITFM_ENABLE_AUX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_ITFM) | 0x13)
}
enum  ubx_cfg_key_itfm_antsetting { UBX_CFG_ITFM_ANTSETTING_UNKNOWN = 0 , UBX_CFG_ITFM_ANTSETTING_PASSIVE = 1 , UBX_CFG_ITFM_ANTSETTING_ACTIVE = 2 }
enum  ubx_cfg_key_mot { UBX_CFG_KEY_MOT_GNSSSPEED_THRS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MOT) | 0x38) , UBX_CFG_KEY_MOT_GNSSDIST_THRS = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_MOT) | 0x3b) }
enum  ubx_cfg_key_msgout {
  UBX_CFG_KEY_MSGOUT_NMEA_ID_DTM_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00a6)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_DTM_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00a6 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_DTM_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00a6 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_DTM_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00aa)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_DTM_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00aa + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_DTM_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00aa + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_DTM_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00a7)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_DTM_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00a7 + 1)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_DTM_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00a7 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GBS_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00dd)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GBS_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00dd + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GBS_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00dd + 4)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GBS_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00e1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GBS_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00e1 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GBS_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00e1 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GBS_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00de)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GBS_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00de + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GBS_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00de + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GGA_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ba)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GGA_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ba + 1)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GGA_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ba + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GGA_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00be)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GGA_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00be + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GGA_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00be + 4)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GGA_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00bb)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GGA_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00bb + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GGA_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00bb + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GLL_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c9)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GLL_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c9 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GLL_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c9 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GLL_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00cd)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GLL_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00cd + 1)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GLL_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00cd + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GLL_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ca)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GLL_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ca + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GLL_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ca + 4)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GNS_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b5)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GNS_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b5 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GNS_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b5 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GNS_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b9)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GNS_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b9 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GNS_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b9 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GNS_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b6)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GNS_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b6 + 1)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GNS_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b6 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GRS_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ce)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GRS_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ce + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GRS_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ce + 4)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GRS_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d2)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GRS_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d2 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GRS_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d2 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GRS_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00cf)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GRS_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00cf + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GRS_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00cf + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSA_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00bf)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSA_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00bf + 1)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GSA_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00bf + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSA_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c3)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSA_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c3 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSA_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c3 + 4)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GSA_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c0)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSA_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c0 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSA_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c0 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GST_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d3)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GST_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d3 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GST_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d3 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GST_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d7)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GST_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d7 + 1)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GST_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d7 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GST_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GST_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d4 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GST_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d4 + 4)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GSV_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSV_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c4 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSV_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c4 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSV_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c8)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GSV_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c8 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSV_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c8 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSV_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c5)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_GSV_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c5 + 1)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_GSV_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00c5 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RLM_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0400)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RLM_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0400 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RLM_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0400 + 4)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_RLM_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0404)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RLM_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0404 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RLM_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0404 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RLM_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0401)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_RLM_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0401 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RLM_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0401 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RMC_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ab)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RMC_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ab + 1)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_RMC_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ab + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RMC_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00af)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RMC_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00af + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RMC_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00af + 4)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_RMC_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ac)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RMC_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ac + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_RMC_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ac + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VLW_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00e7)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_VLW_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00e7 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VLW_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00e7 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VLW_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00eb)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VLW_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00eb + 1)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_VLW_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00eb + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VLW_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00e8)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VLW_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00e8 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VLW_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00e8 + 4)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_VTG_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b0)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VTG_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b0 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VTG_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b0 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VTG_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b4)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_VTG_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b4 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VTG_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b4 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VTG_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_VTG_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b1 + 1)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_VTG_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00b1 + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_ZDA_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d8)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_ZDA_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d8 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_ZDA_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d8 + 4)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_ZDA_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00dc)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_ZDA_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00dc + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_ZDA_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00dc + 4)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_ZDA_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d9)) ,
  UBX_CFG_KEY_MSGOUT_NMEA_ID_ZDA_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d9 + 1)) , UBX_CFG_KEY_MSGOUT_NMEA_ID_ZDA_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00d9 + 4)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYP_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ec)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYP_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ec + 1)) ,
  UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYP_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ec + 4)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYP_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f0)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYP_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f0 + 1)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYP_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f0 + 4)) ,
  UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYP_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ed)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYP_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ed + 1)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYP_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00ed + 4)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYS_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f1)) ,
  UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYS_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f1 + 1)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYS_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f1 + 4)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYS_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f5)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYS_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f5 + 1)) ,
  UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYS_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f5 + 4)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYS_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f2)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYS_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f2 + 1)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYS_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f2 + 4)) ,
  UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYT_I2C_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f6)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYT_I2C_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f6 + 1)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYT_I2C_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f6 + 4)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYT_SPI_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00fa)) ,
  UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYT_SPI_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00fa + 1)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYT_SPI_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00fa + 4)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYT_UART1_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f7)) , UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYT_UART1_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f7 + 1)) ,
  UBX_CFG_KEY_MSGOUT_PUBX_ID_POLYT_UART1_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x00f7 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_COMMS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x034f)) , UBX_CFG_KEY_MSGOUT_UBX_MON_COMMS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x034f + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_COMMS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x034f + 4)) ,
  UBX_CFG_KEY_MSGOUT_UBX_MON_HW2_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01b9)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW2_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01b9 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW2_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01b9 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW3_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0354)) ,
  UBX_CFG_KEY_MSGOUT_UBX_MON_HW3_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0354 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW3_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0354 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01b4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01b4 + 1)) ,
  UBX_CFG_KEY_MSGOUT_UBX_MON_HW_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01b4 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_IO_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01a5)) , UBX_CFG_KEY_MSGOUT_UBX_MON_IO_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01a5 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_IO_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01a5 + 4)) ,
  UBX_CFG_KEY_MSGOUT_UBX_MON_MSGPP_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0196)) , UBX_CFG_KEY_MSGOUT_UBX_MON_MSGPP_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0196 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_MSGPP_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0196 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RF_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0359)) ,
  UBX_CFG_KEY_MSGOUT_UBX_MON_RF_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0359 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RF_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0359 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RXBUF_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01a0)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RXBUF_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01a0 + 1)) ,
  UBX_CFG_KEY_MSGOUT_UBX_MON_RXBUF_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01a0 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RXR_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0187)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RXR_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0187 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RXR_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0187 + 4)) ,
  UBX_CFG_KEY_MSGOUT_UBX_MON_SPAN_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x038b)) , UBX_CFG_KEY_MSGOUT_UBX_MON_SPAN_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x038b + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_SPAN_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x038b + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_TXBUF_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x019b)) ,
  UBX_CFG_KEY_MSGOUT_UBX_MON_TXBUF_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x019b + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_TXBUF_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x019b + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_AOPSTATUS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0079)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_AOPSTATUS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0079 + 1)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_AOPSTATUS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0079 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_CLOCK_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0065)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_CLOCK_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0065 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_CLOCK_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0065 + 4)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_COV_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0083)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_COV_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0083 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_COV_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0083 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_DOP_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0038)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_DOP_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0038 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_DOP_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0038 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_EOE_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x015f)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_EOE_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x015f + 1)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_EOE_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x015f + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_ODO_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x007e)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_ODO_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x007e + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_ODO_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x007e + 4)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_ORB_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0010)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_ORB_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0010 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_ORB_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0010 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_PL_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0024)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_PL_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0024 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_PL_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0024 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_POSECEF_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0024)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_POSECEF_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0024 + 1)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_POSECEF_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0024 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_POSLLH_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0029)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_POSLLH_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0029 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_POSLLH_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0029 + 4)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_PVT_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0006)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_PVT_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0006 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_PVT_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0006 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SAT_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0015)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_SAT_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0015 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SAT_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0015 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SBAS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x006a)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SBAS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x006a + 1)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_SBAS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x006a + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SIG_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0345)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SIG_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0345 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SIG_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0345 + 4)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_SLAS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0336)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SLAS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0336 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SLAS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0336 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_STATUS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x001a)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_STATUS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x001a + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_STATUS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x001a + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEBDS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0051)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEBDS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0051 + 1)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEBDS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0051 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGAL_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0056)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGAL_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0056 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGAL_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0056 + 4)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGLO_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x004c)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGLO_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x004c + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGLO_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x004c + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGPS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0047)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGPS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0047 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGPS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0047 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMELS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0060)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMELS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0060 + 1)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMELS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0060 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEQZSS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0386)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEQZSS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0386 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEQZSS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0386 + 4)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEUTC_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x005b)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEUTC_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x005b + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEUTC_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x005b + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_VELECEF_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x003d)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_VELECEF_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x003d + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_VELECEF_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x003d + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_VELNED_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0042)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_VELNED_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0042 + 1)) ,
  UBX_CFG_KEY_MSGOUT_UBX_NAV_VELNED_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0042 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEAS20_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0643)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEAS20_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0643 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEAS20_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0643 + 4)) ,
  UBX_CFG_KEY_MSGOUT_UBX_RXM_MEAS50_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0648)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEAS50_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0648 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEAS50_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0648 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASC12_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x063e)) ,
  UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASC12_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x063e + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASC12_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x063e + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASD12_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0639)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASD12_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0639 + 1)) ,
  UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASD12_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0639 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASX_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0204)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASX_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0204 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASX_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0204 + 4)) ,
  UBX_CFG_KEY_MSGOUT_UBX_RXM_RLM_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x025e)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_RLM_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x025e + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_RLM_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x025e + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_SFRBX_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0231)) ,
  UBX_CFG_KEY_MSGOUT_UBX_RXM_SFRBX_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0231 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_SFRBX_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0231 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_TM2_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0178)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_TM2_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0178 + 1)) ,
  UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_TM2_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0178 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_TP_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x017d)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_TP_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x017d + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_TP_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x017d + 4)) ,
  UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_VRFY_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0092)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_VRFY_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0092 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_VRFY_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0092 + 4))
}
enum  ubx_cfg_key_navspg {
  UBX_CFG_KEY_NAVSPG_FIXMODE = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0x11) , UBX_CFG_KEY_NAVSPG_INIFIX3D = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NAVSPG) | 0x13) , UBX_CFG_KEY_NAVSPG_WKNROLLOVER = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0x17) , UBX_CFG_KEY_NAVSPG_UTCSTANDARD = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0x1c) ,
  UBX_CFG_KEY_NAVSPG_DYNMODEL = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0x21) , UBX_CFG_KEY_NAVSPG_ACKAIDING = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NAVSPG) | 0x25) , UBX_CFG_KEY_NAVSPG_INFIL_MINSVS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xa1) , UBX_CFG_KEY_NAVSPG_INFIL_MAXSVS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xa2) ,
  UBX_CFG_KEY_NAVSPG_INFIL_MINCNO = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xa3) , UBX_CFG_KEY_NAVSPG_INFIL_MINELEV = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xa4) , UBX_CFG_KEY_NAVSPG_INFIL_NCNOTHRS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xaa) , UBX_CFG_KEY_NAVSPG_INFIL_CNOTHRS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xab) ,
  UBX_CFG_KEY_NAVSPG_OUTFIL_PDOP = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xb1) , UBX_CFG_KEY_NAVSPG_OUTFIL_TDOP = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xb2) , UBX_CFG_KEY_NAVSPG_OUTFIL_PACC = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xb3) , UBX_CFG_KEY_NAVSPG_OUTFIL_TACC = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xb4) ,
  UBX_CFG_KEY_NAVSPG_OUTFIL_FACC = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xb5) , UBX_CFG_KEY_NAVSPG_CONSTR_ALT = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xc1) , UBX_CFG_KEY_NAVSPG_CONSTR_ALTVAR = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xc2) , UBX_CFG_KEY_NAVSPG_CONSTR_DGNSSTO = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xc4) ,
  UBX_CFG_KEY_NAVSPG_SIGATTCOMP = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xd6)
}
enum  ubx_cfg_key_navspg_fixmode { UBX_CFG_NAVSPG_FIXMODE_2DONLY = 1 , UBX_CFG_NAVSPG_FIXMODE_3DONLY = 2 , UBX_CFG_NAVSPG_FIXMODE_AUTO = 3 }
enum  ubx_cfg_key_navspg_utcstandard {
  UBX_CFG_NAVSPG_UTCSTANDARD_AUTO = 0 , UBX_CFG_NAVSPG_UTCSTANDARD_USNO = 3 , UBX_CFG_NAVSPG_UTCSTANDARD_EU = 5 , UBX_CFG_NAVSPG_UTCSTANDARD_SU = 6 ,
  UBX_CFG_NAVSPG_UTCSTANDARD_NTSC = 7 , UBX_CFG_NAVSPG_UTCSTANDARD_NPLI = 8 , UBX_CFG_NAVSPG_UTCSTANDARD_NICT = 9
}
enum  ubx_cfg_key_navspg_dynmodel {
  UBX_CFG_NAVSPG_DYNMODEL_PORTABLE = 0 , UBX_CFG_NAVSPG_DYNMODEL_STATIONARY = 2 , UBX_CFG_NAVSPG_DYNMODEL_PEDESTRIAN = 3 , UBX_CFG_NAVSPG_DYNMODEL_AUTOMOTIVE = 4 ,
  UBX_CFG_NAVSPG_DYNMODEL_SEA = 5 , UBX_CFG_NAVSPG_DYNMODEL_AIRBORNE1G = 6 , UBX_CFG_NAVSPG_DYNMODEL_AIRBORNE2G = 7 , UBX_CFG_NAVSPG_DYNMODEL_AIRBORNE4G = 8 ,
  UBX_CFG_NAVSPG_DYNMODEL_WRIST = 9 , UBX_CFG_NAVSPG_DYNMODEL_BIKE = 10 , UBX_CFG_NAVSPG_DYNMODEL_MOWER = 11 , UBX_CFG_NAVSPG_DYNMODEL_ESCOOTER = 12
}
 Dynamic model for the modem. More...
enum  ubx_cfg_key_nmea {
  UBX_CFG_KEY_NMEA_PROTVER = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NMEA) | 0x01) , UBX_CFG_KEY_NMEA_MAXSVS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NMEA) | 0x02) , UBX_CFG_KEY_NMEA_COMPAT = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x03) , UBX_CFG_KEY_NMEA_CONSIDER = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x04) ,
  UBX_CFG_KEY_NMEA_LIMIT82 = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x05) , UBX_CFG_KEY_NMEA_HIGHPREC = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x06) , UBX_CFG_KEY_NMEA_SVNUMBERING = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NMEA) | 0x07) , UBX_CFG_KEY_NMEA_FILST_GPS = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x11) ,
  UBX_CFG_KEY_NMEA_FILST_SBAS = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x12) , UBX_CFG_KEY_NMEA_FILST_GAL = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x13) , UBX_CFG_KEY_NMEA_FILST_QZSS = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x15) , UBX_CFG_KEY_NMEA_FILST_GLO = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x16) ,
  UBX_CFG_KEY_NMEA_FILST_BDS = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x17) , UBX_CFG_KEY_NMEA_FILST_INVFIX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x21) , UBX_CFG_KEY_NMEA_FILST_MSKFIX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x22) , UBX_CFG_KEY_NMEA_FILST_INVTIME = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x23) ,
  UBX_CFG_KEY_NMEA_FILST_INVDATE = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x24) , UBX_CFG_KEY_NMEA_FILST_ONLYGPS = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x25) , UBX_CFG_KEY_NMEA_FILST_FROZENCOG = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NMEA) | 0x26) , UBX_CFG_KEY_NMEA_MAINTALKERID = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NMEA) | 0x31) ,
  UBX_CFG_KEY_NMEA_GSVTALKERID = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NMEA) | 0x32) , UBX_CFG_KEY_NMEA_BDSTALKERID = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NMEA) | 0x33)
}
enum  ubx_cfg_key_nmea_svnumbering { UBX_CFG_NMEA_SVNUMBERING_STRICT = 0 , UBX_CFG_NMEA_SVNUMBERING_EXTENDED = 1 }
enum  ubx_cfg_key_nmea_maintalkerid {
  UBX_CFG_NMEA_MAINTALKERID_AUTO = 0 , UBX_CFG_NMEA_MAINTALKERID_GP = 1 , UBX_CFG_NMEA_MAINTALKERID_GL = 2 , UBX_CFG_NMEA_MAINTALKERID_GN = 3 ,
  UBX_CFG_NMEA_MAINTALKERID_GA = 4 , UBX_CFG_NMEA_MAINTALKERID_GB = 5 , UBX_CFG_NMEA_MAINTALKERID_GQ = 7
}
enum  ubx_cfg_key_nmea_gsvtalkerid { UBX_CFG_NMEA_GSVTALKERID_GNSS = 0 , UBX_CFG_NMEA_GSVTALKERID_MAIN = 1 }
enum  ubx_cfg_key_odo {
  UBX_CFG_KEY_ODO_USE_ODO = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_ODO) | 0x01) , UBX_CFG_KEY_ODO_USE_COG = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_ODO) | 0x02) , UBX_CFG_KEY_ODO_OUTLPVEL = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_ODO) | 0x03) , UBX_CFG_KEY_ODO_OUTLPCOG = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_ODO) | 0x04) ,
  UBX_CFG_KEY_ODO_PROFILE = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_ODO) | 0x05) , UBX_CFG_KEY_ODO_COGMAXSPEED = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_ODO) | 0x21) , UBX_CFG_KEY_ODO_COGMAXPOSACC = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_ODO) | 0x22) , UBX_CFG_KEY_ODO_VELLPGAIN = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_ODO) | 0x31) ,
  UBX_CFG_KEY_ODO_COGLPGAIN = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_ODO) | 0x32)
}
enum  ubx_cfg_key_odo_profile {
  UBX_CFG_ODO_PROFILE_RUN = 0 , UBX_CFG_ODO_PROFILE_CYCL = 1 , UBX_CFG_ODO_PROFILE_SWIM = 2 , UBX_CFG_ODO_PROFILE_CAR = 3 ,
  UBX_CFG_ODO_PROFILE_CUSTOM = 4
}
enum  ubx_cfg_key_pm {
  UBX_CFG_KEY_PM_OPERATEMODE = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x01) , UBX_CFG_KEY_PM_POSUPDATEPERIOD = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x02) , UBX_CFG_KEY_PM_ACQPERIOD = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x03) , UBX_CFG_KEY_PM_GRIDOFFSET = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x04) ,
  UBX_CFG_KEY_PM_ONTIME = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x05) , UBX_CFG_KEY_PM_MINACQTIME = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x06) , UBX_CFG_KEY_PM_MAXACQTIME = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x07) , UBX_CFG_KEY_PM_DONOTENTEROFF = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x08) ,
  UBX_CFG_KEY_PM_WAITTIMEFIX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x09) , UBX_CFG_KEY_PM_UPDATEEPH = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x0a) , UBX_CFG_KEY_PM_EXTINTWAKE = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x0c) , UBX_CFG_KEY_PM_EXTINTBACKUP = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x0d) ,
  UBX_CFG_KEY_PM_EXTINTINACTIVE = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x0e) , UBX_CFG_KEY_PM_EXTINTINACTIVITY = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x0f) , UBX_CFG_KEY_PM_LIMITPEAKCURR = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x10)
}
enum  ubx_cfg_key_pm_operatemode { UBX_CFG_PM_OPERATEMODE_FULL = 0 , UBX_CFG_PM_OPERATEMODE_PSMOO = 1 , UBX_CFG_PM_OPERATEMODE_PSMCT = 2 }
enum  ubx_cfg_key_qzss { UBX_CFG_KEY_QZSS_USE_SLAS_DGNSS = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_QZSS) | 0x05) , UBX_CFG_KEY_QZSS_USE_SLAS_TESTMODE = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_QZSS) | 0x06) , UBX_CFG_KEY_QZSS_USE_SLAS_RAIM_ = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_QZSS) | 0x07) , UBX_CFG_KEY_QZSS_SLAS_MAX_BASELINE = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_QZSS) | 0x08) }
enum  ubx_cfg_key_rate { UBX_CFG_KEY_RATE_MEAS = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_RATE) | 1) , UBX_CFG_KEY_RATE_NAV = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_RATE) | 2) , UBX_CFG_KEY_RATE_TIMEREF = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_RATE) | 3) }
enum  ubx_cfg_key_rate_timeref {
  UBX_CFG_RATE_TIMEREF_UTC = 0 , UBX_CFG_RATE_TIMEREF_GPS = 1 , UBX_CFG_RATE_TIMEREF_GLO = 2 , UBX_CFG_RATE_TIMEREF_BDS = 3 ,
  UBX_CFG_RATE_TIMEREF_GAL = 4 , UBX_CFG_RATE_TIMEREF_NAVIC = 5
}
enum  ubx_cfg_key_rinv {
  UBX_CFG_KEY_RINV_DUMP = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_RINV) | 0x01) , UBX_CFG_KEY_RINV_BINARY = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_RINV) | 0x02) , UBX_CFG_KEY_RINV_DATA_SIZE = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_RINV) | 0x03) , UBX_CFG_KEY_RINV_CHUNK0 = (_UBX_CFG_KEY_SIZE_8BYTE | (_UBX_CFG_KEY_GRP_RINV) | 0x04) ,
  UBX_CFG_KEY_RINV_CHUNK1 = (_UBX_CFG_KEY_SIZE_8BYTE | (_UBX_CFG_KEY_GRP_RINV) | 0x05) , UBX_CFG_KEY_RINV_CHUNK2 = (_UBX_CFG_KEY_SIZE_8BYTE | (_UBX_CFG_KEY_GRP_RINV) | 0x06) , UBX_CFG_KEY_RINV_CHUNK3 = (_UBX_CFG_KEY_SIZE_8BYTE | (_UBX_CFG_KEY_GRP_RINV) | 0x07)
}
enum  ubx_cfg_key_sbas {
  UBX_CFG_KEY_SBAS_USE_TESTMODE = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SBAS) | 0x02) , UBX_CFG_KEY_SBAS_USE_RANGING = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SBAS) | 0x03) , UBX_CFG_KEY_SBAS_USE_DIFFCORR = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SBAS) | 0x04) , UBX_CFG_KEY_SBAS_USE_INTEGRITY = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SBAS) | 0x05) ,
  UBX_CFG_KEY_SBAS_PRNSCANMASK = (_UBX_CFG_KEY_SIZE_8BYTE | (_UBX_CFG_KEY_GRP_SBAS) | 0x06)
}
enum  ubx_cfg_key_sbas_prnscanmask {
  UBX_CFG_SBAS_PRNSCANMASK_ALL = 0x00 , UBX_CFG_SBAS_PRNSCANMASK_PRN120 = BIT64(0) , UBX_CFG_SBAS_PRNSCANMASK_PRN121 = BIT64(1) , UBX_CFG_SBAS_PRNSCANMASK_PRN122 = BIT64(2) ,
  UBX_CFG_SBAS_PRNSCANMASK_PRN123 = BIT64(3) , UBX_CFG_SBAS_PRNSCANMASK_PRN124 = BIT64(4) , UBX_CFG_SBAS_PRNSCANMASK_PRN125 = BIT64(5) , UBX_CFG_SBAS_PRNSCANMASK_PRN126 = BIT64(6) ,
  UBX_CFG_SBAS_PRNSCANMASK_PRN127 = BIT64(7) , UBX_CFG_SBAS_PRNSCANMASK_PRN128 = BIT64(8) , UBX_CFG_SBAS_PRNSCANMASK_PRN129 = BIT64(9) , UBX_CFG_SBAS_PRNSCANMASK_PRN130 = BIT64(10) ,
  UBX_CFG_SBAS_PRNSCANMASK_PRN131 = BIT64(11) , UBX_CFG_SBAS_PRNSCANMASK_PRN132 = BIT64(12) , UBX_CFG_SBAS_PRNSCANMASK_PRN133 = BIT64(13) , UBX_CFG_SBAS_PRNSCANMASK_PRN134 = BIT64(14) ,
  UBX_CFG_SBAS_PRNSCANMASK_PRN135 = BIT64(15) , UBX_CFG_SBAS_PRNSCANMASK_PRN136 = BIT64(16) , UBX_CFG_SBAS_PRNSCANMASK_PRN137 = BIT64(17) , UBX_CFG_SBAS_PRNSCANMASK_PRN138 = BIT64(18) ,
  UBX_CFG_SBAS_PRNSCANMASK_PRN139 = BIT64(19) , UBX_CFG_SBAS_PRNSCANMASK_PRN140 = BIT64(20) , UBX_CFG_SBAS_PRNSCANMASK_PRN141 = BIT64(21) , UBX_CFG_SBAS_PRNSCANMASK_PRN142 = BIT64(22) ,
  UBX_CFG_SBAS_PRNSCANMASK_PRN143 = BIT64(23) , UBX_CFG_SBAS_PRNSCANMASK_PRN144 = BIT64(24) , UBX_CFG_SBAS_PRNSCANMASK_PRN145 = BIT64(25) , UBX_CFG_SBAS_PRNSCANMASK_PRN146 = BIT64(26) ,
  UBX_CFG_SBAS_PRNSCANMASK_PRN147 = BIT64(27) , UBX_CFG_SBAS_PRNSCANMASK_PRN148 = BIT64(28) , UBX_CFG_SBAS_PRNSCANMASK_PRN149 = BIT64(29) , UBX_CFG_SBAS_PRNSCANMASK_PRN150 = BIT64(30) ,
  UBX_CFG_SBAS_PRNSCANMASK_PRN151 = BIT64(31) , UBX_CFG_SBAS_PRNSCANMASK_PRN152 = BIT64(32) , UBX_CFG_SBAS_PRNSCANMASK_PRN153 = BIT64(33) , UBX_CFG_SBAS_PRNSCANMASK_PRN154 = BIT64(34) ,
  UBX_CFG_SBAS_PRNSCANMASK_PRN155 = BIT64(35) , UBX_CFG_SBAS_PRNSCANMASK_PRN156 = BIT64(36) , UBX_CFG_SBAS_PRNSCANMASK_PRN157 = BIT64(37) , UBX_CFG_SBAS_PRNSCANMASK_PRN158 = BIT64(38)
}
enum  ubx_cfg_key_sec { UBX_CFG_KEY_SEC_CFG_LOCK = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SEC) | 0x09) , UBX_CFG_KEY_SEC_CFG_LOCK_UNLOCKGRP1 = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_SEC) | 0x0a) , UBX_CFG_KEY_SEC_CFG_LOCK_UNLOCKGRP2 = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_SEC) | 0x0b) }
enum  ubx_cfg_key_signal {
  UBX_CFG_KEY_SIGNAL_GPS_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x1f) , UBX_CFG_KEY_SIGNAL_GPS_L1CA_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x01) , UBX_CFG_KEY_SIGNAL_SBAS_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x20) , UBX_CFG_KEY_SIGNAL_SBAS_L1CA_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x05) ,
  UBX_CFG_KEY_SIGNAL_GALILEO_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x21) , UBX_CFG_KEY_SIGNAL_GALILEO_E1_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x07) , UBX_CFG_KEY_SIGNAL_BEIDOU_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x22) , UBX_CFG_KEY_SIGNAL_BEIDOU_B1I_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x0d) ,
  UBX_CFG_KEY_SIGNAL_BEIDOU_B1C_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x0f) , UBX_CFG_KEY_SIGNAL_QZSS_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x24) , UBX_CFG_KEY_SIGNAL_QZSS_L1CA_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x12) , UBX_CFG_KEY_SIGNAL_QZSS_L1S_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x14) ,
  UBX_CFG_KEY_SIGNAL_GLONASS_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x25) , UBX_CFG_KEY_SIGNAL_GLONASS_L1CA_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x18)
}
enum  ubx_cfg_key_spi {
  UBX_CFG_KEY_SPI_MAXFF = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_SPI) | 0x01) , UBX_CFG_KEY_SPI_CPOLARITY = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SPI) | 0x02) , UBX_CFG_KEY_SPI_CPHASE = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SPI) | 0x03) , UBX_CFG_KEY_SPI_EXTENDEDTIMEOUT = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SPI) | 0x05) ,
  UBX_CFG_KEY_SPI_ENABLED = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SPI) | 0x06)
}
enum  ubx_cfg_key_spiinprot { UBX_CFG_KEY_SPIINPROT_UBX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SPIINPROT) | 0x01) , UBX_CFG_KEY_SPIINPROT_NMEA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SPIINPROT) | 0x02) }
enum  ubx_cfg_key_spioutprot { UBX_CFG_KEY_SPIOUTPROT_UBX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SPIOUTPROT) | 0x01) , UBX_CFG_KEY_SPIOUTPROT_NMEA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SPIOUTPROT) | 0x02) }
enum  ubx_cfg_key_tp {
  UBX_CFG_KEY_TP_PULSE_DEF = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x23) , UBX_CFG_KEY_TP_PULSE_LENGTH_DEF = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x30) , UBX_CFG_KEY_TP_CABLEDELAY = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x01) , UBX_CFG_KEY_TP_PERIOD_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x02) ,
  UBX_CFG_KEY_TP_PERIOD_LOCK_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x03) , UBX_CFG_KEY_TP_FREQ_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x24) , UBX_CFG_KEY_TP_FREQ_LOCK_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x25) , UBX_CFG_KEY_TP_LEN_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x04) ,
  UBX_CFG_KEY_TP_LEN_LOCK_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x05) , UBX_CFG_KEY_TP_DUTY_TP1 = (_UBX_CFG_KEY_SIZE_8BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x2a) , UBX_CFG_KEY_TP_DUTY_LOCK_TP1 = (_UBX_CFG_KEY_SIZE_8BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x2b) , UBX_CFG_KEY_TP_USER_DELAY_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x06) ,
  UBX_CFG_KEY_TP_TP1_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TP) | 0x07) , UBX_CFG_KEY_TP_SYNC_GNSS_TP1 = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TP) | 0x08) , UBX_CFG_KEY_TP_USE_LOCKED_TP1 = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TP) | 0x09) , UBX_CFG_KEY_TP_ALIGN_TO_TOW_TP1 = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TP) | 0x0a) ,
  UBX_CFG_KEY_TP_POL_TP1 = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TP) | 0x0b) , UBX_CFG_KEY_TP_TIMEGRID_TP1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x0c)
}
enum  ubx_cfg_key_tp_pulse_def { UBX_CFG_TP_PULSE_DEF_PERIOD = 0 , UBX_CFG_TP_PULSE_DEF_FREQ = 1 }
enum  ubx_cfg_key_tp_pulse_length_def { UBX_CFG_TP_PULSE_LENGTH_DEF_RATIO = 0 , UBX_CFG_TP_PULSE_LENGTH_DEF_LENGTH = 1 }
enum  ubx_cfg_key_tp_pol_tp1 { UBX_CFG_TP_POL_TP1_FALLING_EDGE = 0 , UBX_CFG_TP_POL_TP1_RISING_EDGE = 1 }
enum  ubx_cfg_key_tp_timegrid_tp1 {
  UBX_CFG_TP_TIMEGRID_TP1_UTC = 0 , UBX_CFG_TP_TIMEGRID_TP1_GPS = 1 , UBX_CFG_TP_TIMEGRID_TP1_GLO = 2 , UBX_CFG_TP_TIMEGRID_TP1_BDS = 3 ,
  UBX_CFG_TP_TIMEGRID_TP1_GAL = 4 , UBX_CFG_TP_TIMEGRID_TP1_NAVIC = 5 , UBX_CFG_TP_TIMEGRID_TP1_LOCAL = 15
}
enum  ubx_cfg_key_txready {
  UBX_CFG_KEY_TXREADY_ENABLED = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TXREADY) | 1) , UBX_CFG_KEY_TXREADY_POLARITY = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TXREADY) | 2) , UBX_CFG_KEY_TXREADY_PIN = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_TXREADY) | 3) , UBX_CFG_KEY_TXREADY_THRESHOLD = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_TXREADY) | 4) ,
  UBX_CFG_KEY_TXREADY_INTERFACE = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_TXREADY) | 5)
}
enum  ubx_cfg_key_rate_txready_polarity { UBX_CFG_TXREADY_POLARITY_ACTIVE_HIGH = false , UBX_CFG_TXREADY_POLARITY_ACTIVE_LOW = true }
enum  ubx_cfg_key_rate_txready_interface { UBX_CFG_TXREADY_INTERFACE_I2C = 0 , UBX_CFG_TXREADY_INTERFACE_SPI = 1 }
enum  ubx_cfg_key_uart1 {
  UBX_CFG_KEY_UART1_BAUDRATE = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_UART1) | 1) , UBX_CFG_KEY_UART1_STOPBITS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_UART1) | 2) , UBX_CFG_KEY_UART1_DATABITS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_UART1) | 3) , UBX_CFG_KEY_UART1_PARITY = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_UART1) | 4) ,
  UBX_CFG_KEY_UART1_ENABLED = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_UART1) | 5)
}
enum  ubx_cfg_key_uart1inprot { UBX_CFG_KEY_UART1INPROT_UBX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_UART1INPROT) | 0x01) , UBX_CFG_KEY_UART1INPROT_NMEA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_UART1INPROT) | 0x02) }
enum  ubx_cfg_key_uart1outprot { UBX_CFG_KEY_UART1OUTPROT_UBX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_UART1OUTPROT) | 0x01) , UBX_CFG_KEY_UART1OUTPROT_NMEA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_UART1OUTPROT) | 0x02) }

Functions

static void ubx_msg_prepare_valset (struct net_buf_simple *buf, uint8_t layers)
 Helper to prepare the common CFG-VALSET message.
static void ubx_msg_prepare_valget (struct net_buf_simple *buf, uint8_t layer, uint8_t offset)
 Helper to prepare the common CFG-VALGET message.
static int ubx_cfg_val_parse (const uint8_t **ptr, size_t *remaining, struct ubx_cfg_val *cfg)
 Iteratively parse configuration values from a buffer.

Detailed Description

Copyright
2024 Embeint Holdings Pty Ltd
Author
Jordan Yates jorda.nosp@m.n@em.nosp@m.beint.nosp@m..com

SPDX-License-Identifier: FSL-1.1-ALv2

UBX modem configuration interface, as introduced in Protocol Version 23.01.