cfg.h File Reference

#include <zephyr/net_buf.h>
#include <zephyr/sys/byteorder.h>
#include <infuse/gnss/ubx/protocol.h>

Go to the source code of this file.

Data Structures
struct	ubx_cfg_val
	Configuration value structure as returned by parser. More...

Macros
#define	UBX_CFG_VALUE_APPEND(buf, key, value)
	Macro to append a configuration value to a buffer.

Enumerations
enum	ubx_cfg_key_i2c { UBX_CFG_KEY_I2C_ADDRESS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_I2C) | 1) , UBX_CFG_KEY_I2C_EXTENDEDTIMEOUT = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_I2C) | 2) , UBX_CFG_KEY_I2C_ENABLED = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_I2C) | 3) }
enum	ubx_cfg_key_i2cinprot { UBX_CFG_KEY_I2CINPROT_UBX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_I2CINPROT) | 1) , UBX_CFG_KEY_I2CINPROT_NMEA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_I2CINPROT) | 2) }
enum	ubx_cfg_key_i2coutprot { UBX_CFG_KEY_I2COUTPROT_UBX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_I2COUTPROT) | 1) , UBX_CFG_KEY_I2COUTPROT_NMEA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_I2COUTPROT) | 2) }
enum	ubx_cfg_key_msgout {   UBX_CFG_KEY_MSGOUT_UBX_MON_COMMS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x034f)) , UBX_CFG_KEY_MSGOUT_UBX_MON_COMMS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x034f + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_COMMS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x034f + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW2_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01b9)) ,   UBX_CFG_KEY_MSGOUT_UBX_MON_HW2_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01b9 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW2_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01b9 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW3_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0354)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW3_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0354 + 1)) ,   UBX_CFG_KEY_MSGOUT_UBX_MON_HW3_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0354 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01b4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01b4 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_HW_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01b4 + 4)) ,   UBX_CFG_KEY_MSGOUT_UBX_MON_IO_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01a5)) , UBX_CFG_KEY_MSGOUT_UBX_MON_IO_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01a5 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_IO_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01a5 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_MSGPP_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0196)) ,   UBX_CFG_KEY_MSGOUT_UBX_MON_MSGPP_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0196 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_MSGPP_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0196 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RF_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0359)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RF_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0359 + 1)) ,   UBX_CFG_KEY_MSGOUT_UBX_MON_RF_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0359 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RXBUF_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01a0)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RXBUF_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01a0 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RXBUF_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x01a0 + 4)) ,   UBX_CFG_KEY_MSGOUT_UBX_MON_RXR_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0187)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RXR_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0187 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_RXR_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0187 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_SPAN_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x038b)) ,   UBX_CFG_KEY_MSGOUT_UBX_MON_SPAN_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x038b + 1)) , UBX_CFG_KEY_MSGOUT_UBX_MON_SPAN_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x038b + 4)) , UBX_CFG_KEY_MSGOUT_UBX_MON_TXBUF_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x019b)) , UBX_CFG_KEY_MSGOUT_UBX_MON_TXBUF_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x019b + 1)) ,   UBX_CFG_KEY_MSGOUT_UBX_MON_TXBUF_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x019b + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_AOPSTATUS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0079)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_AOPSTATUS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0079 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_AOPSTATUS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0079 + 4)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_CLOCK_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0065)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_CLOCK_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0065 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_CLOCK_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0065 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_COV_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0083)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_COV_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0083 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_COV_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0083 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_DOP_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0038)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_DOP_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0038 + 1)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_DOP_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0038 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_EOE_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x015f)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_EOE_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x015f + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_EOE_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x015f + 4)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_ODO_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x007e)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_ODO_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x007e + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_ODO_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x007e + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_ORB_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0010)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_ORB_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0010 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_ORB_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0010 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_PL_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0024)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_PL_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0024 + 1)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_PL_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0024 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_POSECEF_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0024)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_POSECEF_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0024 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_POSECEF_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0024 + 4)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_POSLLH_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0029)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_POSLLH_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0029 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_POSLLH_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0029 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_PVT_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0006)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_PVT_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0006 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_PVT_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0006 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SAT_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0015)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SAT_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0015 + 1)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_SAT_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0015 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SBAS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x006a)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SBAS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x006a + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SBAS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x006a + 4)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_SIG_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0345)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SIG_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0345 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SIG_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0345 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SLAS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0336)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_SLAS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0336 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_SLAS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0336 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_STATUS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x001a)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_STATUS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x001a + 1)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_STATUS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x001a + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEBDS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0051)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEBDS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0051 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEBDS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0051 + 4)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGAL_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0056)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGAL_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0056 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGAL_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0056 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGLO_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x004c)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGLO_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x004c + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGLO_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x004c + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGPS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0047)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGPS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0047 + 1)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEGPS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0047 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMELS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0060)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMELS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0060 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMELS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0060 + 4)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEQZSS_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0386)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEQZSS_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0386 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEQZSS_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0386 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEUTC_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x005b)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEUTC_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x005b + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_TIMEUTC_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x005b + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_VELECEF_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x003d)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_VELECEF_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x003d + 1)) ,   UBX_CFG_KEY_MSGOUT_UBX_NAV_VELECEF_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x003d + 4)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_VELNED_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0042)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_VELNED_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0042 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_NAV_VELNED_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0042 + 4)) ,   UBX_CFG_KEY_MSGOUT_UBX_RXM_MEAS20_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0643)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEAS20_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0643 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEAS20_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0643 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEAS50_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0648)) ,   UBX_CFG_KEY_MSGOUT_UBX_RXM_MEAS50_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0648 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEAS50_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0648 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASC12_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x063e)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASC12_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x063e + 1)) ,   UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASC12_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x063e + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASD12_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0639)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASD12_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0639 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASD12_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0639 + 4)) ,   UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASX_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0204)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASX_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0204 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_MEASX_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0204 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_RLM_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x025e)) ,   UBX_CFG_KEY_MSGOUT_UBX_RXM_RLM_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x025e + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_RLM_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x025e + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_SFRBX_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0231)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_SFRBX_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0231 + 1)) ,   UBX_CFG_KEY_MSGOUT_UBX_RXM_SFRBX_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0231 + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_TM2_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0178)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_TM2_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0178 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_TM2_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0178 + 4)) ,   UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_TP_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x017d)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_TP_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x017d + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_TP_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x017d + 4)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_VRFY_I2C = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0092)) ,   UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_VRFY_UART1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0092 + 1)) , UBX_CFG_KEY_MSGOUT_UBX_RXM_TIM_VRFY_SPI = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_MSGOUT) | (0x0092 + 4)) }
enum	ubx_cfg_key_navspg {   UBX_CFG_KEY_NAVSPG_FIXMODE = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0x11) , UBX_CFG_KEY_NAVSPG_INIFIX3D = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NAVSPG) | 0x13) , UBX_CFG_KEY_NAVSPG_WKNROLLOVER = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0x17) , UBX_CFG_KEY_NAVSPG_UTCSTANDARD = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0x1c) ,   UBX_CFG_KEY_NAVSPG_DYNMODEL = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0x21) , UBX_CFG_KEY_NAVSPG_ACKAIDING = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_NAVSPG) | 0x25) , UBX_CFG_KEY_NAVSPG_INFIL_MINSVS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xa1) , UBX_CFG_KEY_NAVSPG_INFIL_MAXSVS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xa2) ,   UBX_CFG_KEY_NAVSPG_INFIL_MINCNO = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xa3) , UBX_CFG_KEY_NAVSPG_INFIL_MINELEV = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xa4) , UBX_CFG_KEY_NAVSPG_INFIL_NCNOTHRS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xaa) , UBX_CFG_KEY_NAVSPG_INFIL_CNOTHRS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xab) ,   UBX_CFG_KEY_NAVSPG_OUTFIL_PDOP = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xb1) , UBX_CFG_KEY_NAVSPG_OUTFIL_TDOP = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xb2) , UBX_CFG_KEY_NAVSPG_OUTFIL_PACC = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xb3) , UBX_CFG_KEY_NAVSPG_OUTFIL_TACC = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xb4) ,   UBX_CFG_KEY_NAVSPG_OUTFIL_FACC = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xb5) , UBX_CFG_KEY_NAVSPG_CONSTR_ALT = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xc1) , UBX_CFG_KEY_NAVSPG_CONSTR_ALTVAR = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xc2) , UBX_CFG_KEY_NAVSPG_CONSTR_DGNSSTO = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xc4) ,   UBX_CFG_KEY_NAVSPG_SIGATTCOMP = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_NAVSPG) | 0xd6) }
enum	ubx_cfg_key_navspg_fixmode { UBX_CFG_NAVSPG_FIXMODE_2DONLY = 1 , UBX_CFG_NAVSPG_FIXMODE_3DONLY = 2 , UBX_CFG_NAVSPG_FIXMODE_AUTO = 3 }
enum	ubx_cfg_key_navspg_utcstandard {   UBX_CFG_NAVSPG_UTCSTANDARD_AUTO = 0 , UBX_CFG_NAVSPG_UTCSTANDARD_USNO = 3 , UBX_CFG_NAVSPG_UTCSTANDARD_EU = 5 , UBX_CFG_NAVSPG_UTCSTANDARD_SU = 6 ,   UBX_CFG_NAVSPG_UTCSTANDARD_NTSC = 7 , UBX_CFG_NAVSPG_UTCSTANDARD_NPLI = 8 , UBX_CFG_NAVSPG_UTCSTANDARD_NICT = 9 }
enum	ubx_cfg_key_navspg_dynmodel {   UBX_CFG_NAVSPG_DYNMODEL_PORTABLE = 0 , UBX_CFG_NAVSPG_DYNMODEL_STATIONARY = 2 , UBX_CFG_NAVSPG_DYNMODEL_PEDESTRIAN = 3 , UBX_CFG_NAVSPG_DYNMODEL_AUTOMOTIVE = 4 ,   UBX_CFG_NAVSPG_DYNMODEL_SEA = 5 , UBX_CFG_NAVSPG_DYNMODEL_AIRBORNE1G = 6 , UBX_CFG_NAVSPG_DYNMODEL_AIRBORNE2G = 7 , UBX_CFG_NAVSPG_DYNMODEL_AIRBORNE4G = 8 ,   UBX_CFG_NAVSPG_DYNMODEL_WRIST = 9 , UBX_CFG_NAVSPG_DYNMODEL_BIKE = 10 , UBX_CFG_NAVSPG_DYNMODEL_MOWER = 11 , UBX_CFG_NAVSPG_DYNMODEL_ESCOOTER = 12 }
enum	ubx_cfg_key_pm {   UBX_CFG_KEY_PM_OPERATEMODE = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x01) , UBX_CFG_KEY_PM_POSUPDATEPERIOD = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x02) , UBX_CFG_KEY_PM_ACQPERIOD = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x03) , UBX_CFG_KEY_PM_GRIDOFFSET = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x04) ,   UBX_CFG_KEY_PM_ONTIME = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x05) , UBX_CFG_KEY_PM_MINACQTIME = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x06) , UBX_CFG_KEY_PM_MAXACQTIME = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x07) , UBX_CFG_KEY_PM_DONOTENTEROFF = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x08) ,   UBX_CFG_KEY_PM_WAITTIMEFIX = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x09) , UBX_CFG_KEY_PM_UPDATEEPH = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x0a) , UBX_CFG_KEY_PM_EXTINTWAKE = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x0c) , UBX_CFG_KEY_PM_EXTINTBACKUP = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x0d) ,   UBX_CFG_KEY_PM_EXTINTINACTIVE = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x0e) , UBX_CFG_KEY_PM_EXTINTINACTIVITY = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_PM) | 0x0f) , UBX_CFG_KEY_PM_LIMITPEAKCURR = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_PM) | 0x10) }
enum	ubx_cfg_key_pm_operatemode { UBX_CFG_KEY_PM_OPERATEMODE_FULL = 0 , UBX_CFG_KEY_PM_OPERATEMODE_PSMOO = 1 , UBX_CFG_KEY_PM_OPERATEMODE_PSMCT = 2 }
enum	ubx_cfg_key_rate { UBX_CFG_KEY_RATE_MEAS = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_RATE) | 1) , UBX_CFG_KEY_RATE_NAV = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_RATE) | 2) , UBX_CFG_KEY_RATE_TIMEREF = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_RATE) | 3) }
enum	ubx_cfg_key_rate_timeref {   UBX_CFG_RATE_TIMEREF_UTC = 0 , UBX_CFG_RATE_TIMEREF_GPS = 1 , UBX_CFG_RATE_TIMEREF_GLO = 2 , UBX_CFG_RATE_TIMEREF_BDS = 3 ,   UBX_CFG_RATE_TIMEREF_GAL = 4 , UBX_CFG_RATE_TIMEREF_NAVIC = 5 }
enum	ubx_cfg_key_signal {   UBX_CFG_KEY_SIGNAL_GPS_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x1f) , UBX_CFG_KEY_SIGNAL_GPS_L1CA_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x01) , UBX_CFG_KEY_SIGNAL_SBAS_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x20) , UBX_CFG_KEY_SIGNAL_SBAS_L1CA_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x05) ,   UBX_CFG_KEY_SIGNAL_GALILEO_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x21) , UBX_CFG_KEY_SIGNAL_GALILEO_E1_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x07) , UBX_CFG_KEY_SIGNAL_BEIDOU_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x22) , UBX_CFG_KEY_SIGNAL_BEIDOU_B1L_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x0d) ,   UBX_CFG_KEY_SIGNAL_BEIDOU_B1C_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x0f) , UBX_CFG_KEY_SIGNAL_QZSS_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x24) , UBX_CFG_KEY_SIGNAL_QZSS_L1CA_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x12) , UBX_CFG_KEY_SIGNAL_QZSS_L1S_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x14) ,   UBX_CFG_KEY_SIGNAL_GLONASS_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x25) , UBX_CFG_KEY_SIGNAL_GLONASS_L1CA_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_SIGNAL) | 0x18) }
enum	ubx_cfg_key_tp {   UBX_CFG_KEY_TP_PULSE_DEF = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x23) , UBX_CFG_KEY_TP_PULSE_LENGTH_DEF = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x30) , UBX_CFG_KEY_TP_CABLEDELAY = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x01) , UBX_CFG_KEY_TP_PERIOD_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x02) ,   UBX_CFG_KEY_TP_PERIOD_LOCK_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x03) , UBX_CFG_KEY_TP_FREQ_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x24) , UBX_CFG_KEY_TP_FREQ_LOCK_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x25) , UBX_CFG_KEY_TP_LEN_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x04) ,   UBX_CFG_KEY_TP_LEN_LOCK_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x05) , UBX_CFG_KEY_TP_DUTY_TP1 = (_UBX_CFG_KEY_SIZE_8BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x2a) , UBX_CFG_KEY_TP_DUTY_LOCK_TP1 = (_UBX_CFG_KEY_SIZE_8BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x2b) , UBX_CFG_KEY_TP_USER_DELAY_TP1 = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x06) ,   UBX_CFG_KEY_TP_TP1_ENA = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TP) | 0x07) , UBX_CFG_KEY_TP_SYNC_GNSS_TP1 = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TP) | 0x08) , UBX_CFG_KEY_TP_USE_LOCKED_TP1 = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TP) | 0x09) , UBX_CFG_KEY_TP_ALIGN_TO_TOW_TP1 = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TP) | 0x0a) ,   UBX_CFG_KEY_TP_POL_TP1 = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TP) | 0x0b) , UBX_CFG_KEY_TP_TIMEGRID_TP1 = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_TP) | 0x0c) }
enum	ubx_cfg_key_tp_pulse_def { UBX_CFG_TP_PULSE_DEF_PERIOD = 0 , UBX_CFG_TP_PULSE_DEF_FREQ = 1 }
enum	ubx_cfg_key_tp_pulse_length_def { UBX_CFG_TP_PULSE_LENGTH_DEF_RATIO = 0 , UBX_CFG_TP_PULSE_LENGTH_DEF_LENGTH = 1 }
enum	ubx_cfg_key_tp_pol_tp1 { UBX_CFG_TP_POL_TP1_FALLING_EDGE = 0 , UBX_CFG_TP_POL_TP1_RISING_EDGE = 1 }
enum	ubx_cfg_key_tp_timegrid_tp1 {   UBX_CFG_TP_TIMEGRID_TP1_UTC = 0 , UBX_CFG_TP_TIMEGRID_TP1_GPS = 1 , UBX_CFG_TP_TIMEGRID_TP1_GLO = 2 , UBX_CFG_TP_TIMEGRID_TP1_BDS = 3 ,   UBX_CFG_TP_TIMEGRID_TP1_GAL = 4 , UBX_CFG_TP_TIMEGRID_TP1_NAVIC = 5 , UBX_CFG_TP_TIMEGRID_TP1_LOCAL = 15 }
enum	ubx_cfg_key_txready {   UBX_CFG_KEY_TXREADY_ENABLED = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TXREADY) | 1) , UBX_CFG_KEY_TXREADY_POLARITY = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_TXREADY) | 2) , UBX_CFG_KEY_TXREADY_PIN = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_TXREADY) | 3) , UBX_CFG_KEY_TXREADY_THRESHOLD = (_UBX_CFG_KEY_SIZE_2BYTE | (_UBX_CFG_KEY_GRP_TXREADY) | 4) ,   UBX_CFG_KEY_TXREADY_INTERFACE = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_TXREADY) | 5) }
enum	ubx_cfg_key_rate_txready_polarity { UBX_CFG_TXREADY_POLARITY_ACTIVE_HIGH = false , UBX_CFG_TXREADY_POLARITY_ACTIVE_LOW = true }
enum	ubx_cfg_key_rate_txready_interface { UBX_CFG_TXREADY_INTERFACE_I2C = 0 , UBX_CFG_TXREADY_INTERFACE_SPI = 1 }
enum	ubx_cfg_key_uart1 {   UBX_CFG_KEY_UART1_BAUDRATE = (_UBX_CFG_KEY_SIZE_4BYTE | (_UBX_CFG_KEY_GRP_UART1) | 1) , UBX_CFG_KEY_UART1_STOPBITS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_UART1) | 2) , UBX_CFG_KEY_UART1_DATABITS = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_UART1) | 3) , UBX_CFG_KEY_UART1_PARITY = (_UBX_CFG_KEY_SIZE_1BYTE | (_UBX_CFG_KEY_GRP_UART1) | 4) ,   UBX_CFG_KEY_UART1_ENABLED = (_UBX_CFG_KEY_SIZE_1BIT_ | (_UBX_CFG_KEY_GRP_UART1) | 5) }

Functions
static void	ubx_msg_prepare_valset (struct net_buf_simple *buf, uint8_t layers)
	Helper to prepare the common CFG-VALSET message.
static void	ubx_msg_prepare_valget (struct net_buf_simple *buf, uint8_t layer, uint8_t offset)
	Helper to prepare the common CFG-VALGET message.
static int	ubx_cfg_val_parse (const uint8_t **ptr, size_t *remaining, struct ubx_cfg_val *cfg)
	Iteratively parse configuration values from a buffer.

Detailed Description

Copyright

2024 Embeint Holdings Pty Ltd

Author

Jordan Yates jorda.nosp@m.n@em.nosp@m.beint.nosp@m..com

SPDX-License-Identifier: FSL-1.1-ALv2

UBX modem configuration interface, as introduced in Protocol Version 23.01.