Infuse-IoT SDK API 0.0.1
A Scalable Open Source RTOS
Loading...
Searching...
No Matches

Response from UBX_MSG_ID_MON_HW (polled or periodic) More...

#include <protocol.h>

Data Fields

uint32_t pin_sel
 Mask of pins set as PIO (otherwise peripheral)
uint32_t pin_bank
 Mask of pins set as bank B (otherwise bank A)
uint32_t pin_dir
 Mask of pins set as outputs (otherwise inputs)
uint32_t pin_val
 Mask of pins currently high.
uint16_t noise_per_ms
 Noise level measured by the GNSS core.
uint16_t agc_cnt
 AGC monitor (range 0 to 8191)
uint8_t ant_state
 Antenna supervisor state (0 = init, 1 = unknown, 2 = OK, 3 = short, 4 = open)
uint8_t ant_power
 Antenna power state (0 = off, 1 = on, 2 = unknown)
uint8_t flags
 Hardware status flags.
uint8_t reserved1
 Reserved.
uint32_t used_mask
 Mask of pins used by the virtual pin manager.
uint8_t vp [17]
 Virtual pin mapping for each physical pin.
uint8_t cw_supression
 CW jamming indicator (0 = none, 255 = strong)
uint8_t reserved2 [2]
 Reserved.
uint32_t pin_irq
 Mask of pins with the PIO interrupt enabled.
uint32_t pull_high
 Mask of pins with the pull-up resistor enabled.
uint32_t pull_low
 Mask of pins with the pull-down resistor enabled.

Detailed Description

Response from UBX_MSG_ID_MON_HW (polled or periodic)

Field Documentation

◆ agc_cnt

uint16_t ubx_msg_mon_hw::agc_cnt

AGC monitor (range 0 to 8191)

◆ ant_power

uint8_t ubx_msg_mon_hw::ant_power

Antenna power state (0 = off, 1 = on, 2 = unknown)

◆ ant_state

uint8_t ubx_msg_mon_hw::ant_state

Antenna supervisor state (0 = init, 1 = unknown, 2 = OK, 3 = short, 4 = open)

◆ cw_supression

uint8_t ubx_msg_mon_hw::cw_supression

CW jamming indicator (0 = none, 255 = strong)

◆ flags

uint8_t ubx_msg_mon_hw::flags

Hardware status flags.

◆ noise_per_ms

uint16_t ubx_msg_mon_hw::noise_per_ms

Noise level measured by the GNSS core.

◆ pin_bank

uint32_t ubx_msg_mon_hw::pin_bank

Mask of pins set as bank B (otherwise bank A)

◆ pin_dir

uint32_t ubx_msg_mon_hw::pin_dir

Mask of pins set as outputs (otherwise inputs)

◆ pin_irq

uint32_t ubx_msg_mon_hw::pin_irq

Mask of pins with the PIO interrupt enabled.

◆ pin_sel

uint32_t ubx_msg_mon_hw::pin_sel

Mask of pins set as PIO (otherwise peripheral)

◆ pin_val

uint32_t ubx_msg_mon_hw::pin_val

Mask of pins currently high.

◆ pull_high

uint32_t ubx_msg_mon_hw::pull_high

Mask of pins with the pull-up resistor enabled.

◆ pull_low

uint32_t ubx_msg_mon_hw::pull_low

Mask of pins with the pull-down resistor enabled.

◆ reserved1

uint8_t ubx_msg_mon_hw::reserved1

Reserved.

◆ reserved2

uint8_t ubx_msg_mon_hw::reserved2[2]

Reserved.

◆ used_mask

uint32_t ubx_msg_mon_hw::used_mask

Mask of pins used by the virtual pin manager.

◆ vp

uint8_t ubx_msg_mon_hw::vp[17]

Virtual pin mapping for each physical pin.


The documentation for this struct was generated from the following file: